Building Better Qubits with GPU-Accelerated Computing

Quantum computing promises to revolutionize science and industry, from drug discovery to materials science. But building a useful, large-scale quantum computer is a significant engineering challenge, particularly when it comes to designing qubits that are less susceptible to noise.

In traditional chip design, the modern semiconductor industry relies on Electronic Design Automation (EDA) tools to create and validate chips in software before committing to costly fabrication. Similarly, the design of quantum chips can benefit significantly from EDA tools. Simulating the noise in quantum chips is notoriously complex. Such chips are highly sensitive to both noise in the environment and unwanted interactions between different circuit elements, something known as cross-talk.

NVIDIA works closely with Lawrence Berkeley National Laboratory (Berkeley Lab) and other researchers to provide the hardware and software platform needed for GPU-accelerated EDA tools that allow rapid iteration on quantum chip designs.

Berkeley Lab researchers have developed ARTEMIS, an open source simulation package for full-wave simulation of novel chips. Using the NVIDIA CUDA platform to GPU-accelerate ARTEMIS, the researchers recently demonstrated the world’s largest simulation of a full quantum chip on the NVIDIA GPUs within NERSC’s Perlmutter supercomputer.

Simulating across spatial-scales

One of the most popular architectures for developing quantum processors is to leverage superconducting qubits fabricated on a solid-state substrate, allowing the use of fabrication methods similar to those from traditional semiconductor manufacturing.

Accurate simulations of these qubits must resolve physics across multiple orders of magnitude in spatial scale, from micrometer-scale qubit structures to the centimeter-scale dimensions of the full chip. Without access to GPU-accelerated simulations, however, simulations-to-date have been limited either to small, high-resolution regions of the chip or coarser-resolution, full-chip models that miss critical microscale interactions; they have forced researchers to trade accuracy for scalability.

Accurately capturing the coupled electromagnetic behavior of these systems requires a computationally demanding time-domain approach. Time-resolved simulations can track how control pulses and microwave signals propagate, reflect, and interfere across the chip in real time, directly revealing transient effects such as cross-talk, mode coupling, and signal distortion that frequency-domain methods often miss.

A diagram of a full, centimeter size superconducting quantum chip with a zoom-in on a micron scale feature on the right. — Figure 1. The superconducting processor layout contains spatial scales ranging from centimeter-scale (full two-layer chip, depicted on the left) to micron-scale etched features (depicted on the right).

Berkeley Lab’s ARTEMIS platform optimizes these comprehensive simulations for parallelization on NVIDIA GPUs—providing a full-wave, time-domain electromagnetic solver. Due to the extreme scalability of GPU-accelerated simulations, ARTEMIS can accurately model large, chip-scale systems while preserving fine spatial and temporal details. It resolves electromagnetic interactions from micrometer-scale qubit structures to centimeter-scale control lines. This multiscale fidelity provides new physical insight into chip-level coupling dynamics between control signals and qubit structures.

A plot of the scaling efficiency of ARTEMIS up to 2048 GPUs — *Figure 2. ARTEMIS exhibits excellent weak scaling on thousands of GPUs on the Perlmutter system. On a node-by-node basis, GPU simulations are 60x faster than CPU-only simulations.*

Simulating on the shoulders of giants

Announced at GTC DC, Berkeley Lab and NERSC performed the first full-wave electrodynamical simulation of an entire state-of-the-art, multi-layer quantum chip. The team harnessed the full power of Perlmutter, running the simulation on 6,724 NVIDIA A100 Tensor Core GPUs, 95% of the entire system. The 1 cm chip was discretized into over 10 billion grid points using micron resolution.

Video 1. Video of the X-component of the electric field across the entire chip. The top control layer is excited by a control pulse from the bottom left. The field propagates along the co-planar waveguide transmission line and the injected field couples to the qubit layer. The simulation reveals how the field interferes and resonates, coupling through wires and seams, highlighting spurious modes and crosstalk paths that would be missed by steady-state models.

It took nearly eight hours on the full system to model the 1.5 million time steps required to reach 1 nanosecond of physical time. The simulation modeled the full-time dynamics of the chip, allowing researchers to observe the propagation of control signals through the chip at femtosecond time resolution. This is critical for understanding crosstalk, which is one of the biggest hurdles in the design of superconducting quantum chips.

By drawing on the NVIDIA CUDA platform for a validated and scalable simulation framework, physicists can now test novel qubit architectures, identify and reduce noise sources and cross-talk, and validate quantum chip designs before entering the fabrication cycle. This information is critical for designers to build better, more robust chips, and accelerate their fabrication cycles—providing the powerful toolset needed to accelerate the path to useful quantum computing.