NVSHMEM


NVSHMEM™ is a parallel programming interface based on OpenSHMEM that provides efficient and scalable communication for NVIDIA GPU clusters. NVSHMEM creates a global address space for data that spans the memory of multiple GPUs and can be accessed with fine-grained GPU-initiated operations, CPU-initiated operations, and operations on CUDA® streams.


Download NVSHMEM Documentation Release Notes GitHub NVSHMEM API Guide

Existing communication models, such as Message-Passing Interface (MPI), orchestrate data transfers using the CPU. In contrast, NVSHMEM uses asynchronous, GPU-initiated data transfers, eliminating synchronization overheads between the CPU and the GPU.

Efficient, Strong Scaling

NVSHMEM enables long-running kernels that include both communication and computation, reducing overheads that can limit an application’s performance when strong scaling.

Low Overhead

One-sided communication primitives reduce overhead by allowing the initiating process or GPU thread to specify all information required to complete a data transfer. This low-overhead model enables many GPU threads to communicate efficiently.

Naturally Asynchronous

Asynchronous communications make it easier for programmers to interleave computation and communication, thereby increasing overall application performance.


What's New in NVSHMEM 3.8

  • Added host- and device-side RMA regions for application-controlled batching of nonblocking RMA operations.
  • Added counted-signal APIs (based on counted writes) for block-scoped CFT transfers.
  • Added multicast logical endpoints for NVLS fcollect and reduction operations.
  • Extended logical endpoints to additional execution scopes, including tile RMA and collective operations, and added support for device atomics.​
  • Added a collective-launch API that accepts user-provided CUDA launch attributes.
  • Added CUDA 13.4 features for Vera Rubin architectures, including support for locality domains and fabric-clique detection.
  • Added multi-NIC support for IBRC and IBDevX transports.
  • Added configurable RC QP mapping and race-free QP/NIC rotation through NVSHMEM_IBGDA_RC_MAP_BY and NVSHMEM_GPUNETIO_RC_MAP_BY.
  • Added capability-aware multi-NIC atomic routing through NVSHMEM_IB_ATOMIC_POLICY across the InfiniBand and GPUNetIO transports.
  • Added a CUDA DMA-BUF fallback for CPU mappings of GPU memory on supported systems when GDRCopy is unavailable.
  • Added experimental Rust bindings for host APIs and CUDA-Oxide device APIs.
  • Added installable NVSHMEM agent skills for onboarding, configuration, troubleshooting, and performance workflows.
  • Improved logical-endpoint performance for unicast operations and NVLS collectives.

What's New in NVSHMEM4Py 0.4.0

  • Added Numba CUDA MLIR device bindings for RMA, atomics, collectives, memory operations, signaling, and synchronization.
  • Added high-level host wrappers for atomics, RMA, signaling, memory management, and teams.
  • Added wrappers for TMA shared-memory registration in Numba and CuTe DSL, and for device-side fence and quiet operations in CuTe DSL.
  • Added Torch float8_e4m3fn and float8_e5m2 tensor allocation and bfloat16 support to CuTe RMA and collective bindings.​

Key Features


  • Combines the memory of multiple GPUs into a partitioned global address space that’s accessed through NVSHMEM APIs
  • Includes a low-overhead, in-kernel communication API for use by GPU threads
  • Includes stream-based and CPU-initiated communication APIs
  • Supports x86 and Arm processors.
  • Is interoperable with MPI and other OpenSHMEM implementations

NVSHMEM Advantages


Increase Performance

Convolution is a compute-intensive kernel that’s used in a wide variety of applications, including image processing, machine learning, and scientific computing. Spatial parallelization decomposes the domain into sub-partitions that are distributed over multiple GPUs with nearest-neighbor communications, often referred to as halo exchanges.

In the Livermore Big Artificial Neural Network (LBANN) deep learning framework, spatial-parallel convolution is implemented using several communication methods, including MPI and NVSHMEM. The MPI-based halo exchange uses the standard send and receive primitives, whereas the NVSHMEM-based implementation uses one-sided put, yielding significant performance improvements on Lawrence Livermore National Laboratory’s Sierra supercomputer.


Efficient Strong-Scaling on Sierra Supercomputer



Efficient Strong-Scaling on NVIDIA DGX SuperPOD

Accelerate Time to Solution

Reducing the time to solution for high-performance, scientific computing workloads generally requires a strong-scalable application. QUDA is a library for lattice quantum chromodynamics (QCD) on GPUs, and it’s used by the popular MIMD Lattice Computation (MILC) and Chroma codes.

NVSHMEM-enabled QUDA avoids CPU-GPU synchronization for communication, thereby reducing critical-path latencies and significantly improving strong-scaling efficiency.

Watch the GTC 2020 Talk



Simplify Development

The conjugate gradient (CG) method is a popular numerical approach to solving systems of linear equations, and CGSolve is an implementation of this method in the Kokkos programming model. The CGSolve kernel showcases the use of NVSHMEM as a building block for higher-level programming models like Kokkos.

NVSHMEM enables efficient multi-node and multi-GPU execution using Kokkos global array data structures without requiring explicit code for communication between GPUs. As a result, NVSHMEM-enabled Kokkos significantly simplifies development compared to using MPI and CUDA.


Productive Programming of Kokkos CGSolve

Resources



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