NVIDIA Orin Voltage Monitoring via VRS12 (VMON)

  • Initial configuration and set up for VMON, executing the HW BIST provided by VMON
  • Programming the VMON Chip with thresholds for UV/OV detection
  • Continuous monitoring of VMON Reset pin indicating UV/OV and reporting the detected errors to Error handler module
  • Implements safety measures like toggle check for VMON NIRQ pin, ACT/SHDN and ACT/SLP signals.
  • The following error scenarios are detected
    • VMON Chip internal errors are detected via BIST failure
    • I2C communication failure while read/write operations are detected via CRC
    • Errors during the programming of VMON chip are detected by reading back the values written to the VMON registers.
  • In the current SW functionality, VMON error are notified to Error handler module, and the board is powered off.