Enabling HDMI

The NVIDIA Orin™ SoC can support both the DisplayPort (DP) and HDMI connectors, but not sending display output on both connectors at the same time on a given platform. By default, only DisplayPort is enabled for NVIDIA DRIVE AGX Orin™ platform in NVIDIA DRIVE® OS 6.0.

To enable HDMI on your reference platforms with HDMI output, the following platform-specific changes are required:

After making all the preceding platform-specific changes to bring up HDMI, you must perform a full build of the image followed by a full flash of the board for the changes to take effect.

Modifying Pinmux Configuration for the DPAUX HPD Pin

By default, the DPAUX HPD pin is set to SFIO mode for the DisplayPort functionality. For HDMI, the DPAUX HPD pin should be set to GPIO mode.

The following example shows that the DPAUX HPD pin is set to GPIO mode depending on your board schematics:
dp_aux_ch0_hpd_pm0 {
	nvidia,pins = "dp_aux_ch0_hpd_pm0";
	nvidia,function = "rsvd1";
	nvidia,pull = <TEGRA_PIN_PULL_UP>;
	nvidia,tristate = <TEGRA_PIN_ENABLE>;
	nvidia,enable-input = <TEGRA_PIN_ENABLE>;
	nvidia,io-high-voltage = <TEGRA_PIN_DISABLE>;
	nvidia,lpdr = <TEGRA_PIN_DISABLE>;
};

For information on the pinmux configuration for the DPAUX HPD pin on a specific platform, see Configuring the Pinmux and GPIO.

Modifying DCB Blob to Enable HDMI

Display DCB blob has only the DisplayPort connector enabled by default. HDMI connector must also be enabled on the platform with the HDMI output by using the DCB tool as described in Display Device Tree. The following example shows the DCB blob output on reading the DCB blob with HDMI enabled by using the DCB tool.

=== Reading DCB blob ===

########## Tegra DCB BLOB ###############
########### Display Devices #############
Display Devices::
	Display Devices : [0]
		Type               : [DP]
		CCB                : [0]
		Heads              : 0:[Y] 1:[Y]
		Sor                : [0 ]
		DP Lane Count      : [4]
		DP Link Rate       : [8.1GHz]
		Connector          : [0]
		Bus                : [0]
	Display Devices : [1]
		Type               : [TMDS]
		CCB                : [0]
		Heads              : 0:[Y] 1:[Y]
		Sor                : [0 ]
		HDMI capable       : [1]
		Connector          : [1]
		Bus                : [0]
############### CCB Entries ###############
CCB::
*CCB entries that have both I2C and AUX ports unused (value = 31) are not displayed
	CCB Index : 0
		I2C Port           : [6]
		AUX Port           : [0]
########### Connector entries #############
Connectors::
	Connector Index : 0x0
		Type               : [DP]
		Hotplug            : A:[Y]
	Connector Index : 0x1
		Type               : [HDMI]
		Hotplug            : A:[Y]

################# ******* #################

Enabling HDMI Hot Plug GPIO in the Device Tree

The following example shows a display device tree fragment that contains the HDMI hot plug GPIO DT property as per display device tree bindings, where the HDMI hot plug GPIO pin is from Tegra Main GPIO controller and Port M and Pin 0 with the GPIO_ACTIVE_HIGH GPIO flags set. For more information, refer to GPIO device tree bindings. The actual GPIO pin used for HDMI hot plug and the default state of the GPIO pin should be determined based on the corresponding platform schematics. 
\{
    display@13800000 {
        os_gpio_hotplug_a = <&tegra_main_gpio TEGRA234_MAIN_GPIO(M, 0) GPIO_ACTIVE_HIGH>;
    };
};

For information on enabling particular HDMI hotplug GPIO pin in PCT files, see the HDMI Configuration section in AV PCT Input/Output Resource Assignment.