The Tegra K1 Technical Reference Manual ("TRM") is a technical document of over 2,300 pages targeted at those working on open source, hardware design or other low level software projects that use or target the Tegra K1 processor. The TRM focuses on the logical organization and control of Tegra K1 Series devices. It provides information for those modules that interface to external devices, or those that control fundamental chip operations. The modules detailed in this document provide an overview, any necessary programming guidelines, and a register listing for that module. Internal functional units such as video and graphics hardware acceleration are controlled by NVIDIA provided software and are not documented.

NVIDIA provides access to the Tegra K1 Technical Reference Manual to registered developers only. To become a registered developer, please sign up for our Embedded Registered Developer Program.

If you are already a Registered Developer, you can download the TRM from our Download Center.

Table of Contents

  1. Introduction
  2. Address Map
  3. Interrupt Controller
  4. Semaphores
  5. CLock and Reset Controller
  6. CL-DVFS
  7. Timers
  8. Multi-Purpose I/O Pins and Pin Multiplexing (Pinmuxing)
  9. Power Management Controller
  10. Activity Monitor
  11. Real-Time Clock
  12. Host Subsystem
  13. Video Image Compositor (VIC)
  14. CPU
  15. Flow Controller
  16. Memory Controller
  17. AHB
  18. APB
  19. USB Complex
  20. Audio Hub (AHUB)
  21. Display Controller
  22. MIPI-DSI (Display Serial Interface)
  23. High-Definition Multimedia Interface
  24. LVDS/eDP Display Output
  25. HDMI CEC
  26. MIPI-CSI (Camera Serial Interface)
  27. MIPI D-PHY Calibration for CSI and DSI
  28. Video Input (VI)
  29. SD/MMC Controller
  30. SNOR (GMI) Controller
  31. SATA Controller
  32. PCI Express (PCIe) Controller
  33. I2C Controller
  34. UART and VFIR Controller
  35. Serial Peripheral Interface (SPI) Controller
  36. PWM Controller
  37. Thermal Sensor and Thermal Throttling Controller
  38. Audio-Video Processor (AVP)
  39. AVP Cache Controller