The Tegra 3 Technical Reference Manual ("TRM") is a technical document of over 1,900 pages targeted at those working on open source or other low level software projects that use or target the Tegra 3 processor. The TRM focuses on the logical organization and control of Tegra 3 Series devices. It provides information for those modules that interface to external devices, or those that control fundamental chip operations. The modules detailed in this document provide an overview, any necessary programming guidelines, and a register listing for that module. Internal functional units such as video and graphics hardware acceleration are controlled by NVIDIA provided software and not documented.

NVIDIA provides access to the Tegra 3 Technical Reference Manual to registered developers only. To become a registered developer, please sign up for our Embedded Registered Developer Program.

If you are already a Registered Developer, you can download the TRM from our Download Center.

Table of Contents

  1. Introduction
  2. Address and Interrupt Map
  3. Interrupt Controller
  4. Arbitration Semaphores
  5. Atomics
  6. Clock and Reset Controller
  7. Timers
  8. Multi-Purpose I/O Pins and Pin Multiplexing (Pinmuxing)
  9. Power Management Controller
  10. Real-Time Clock
  11. GR2D
  12. EPP - Encoder Pre-Processor
  13. Keyboard Controller
  14. GPIO Controller
  15. CPU
  16. Level 2 Cache Controller
  17. Flow Controller
  18. Memory Controller
  19. AHB
  20. APB
  21. USB Complex
  22. Audio Hub
  23. Display Controller
  24. MIPI-DSI (Display Serial Interface)
  25. High-Definition Multimedia Interface
  26. MIPI-CSI (Camera Serial Interface)
  27. Video Input (VI)
  28. SD/MMC Controller
  29. NAND Flash Controller
  30. GMI Controller
  31. SATA Controller
  32. PCI Express (PCIe) Architecture
  33. I2C Controller
  34. UART and VFIR Controller
  35. SLINK: SPI Peripheral Interface
  36. One Wire Battery Controller
  37. PWFM Controller
  38. Thermal Sensor