NVIDIA DRIVE OS Linux SDK API Reference

6.0.3 Release
nvmedia_surface.h
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1 /*
2  * Copyright (c) 2017-2022, NVIDIA CORPORATION. All rights reserved. All
3  * information contained herein is proprietary and confidential to NVIDIA
4  * Corporation. Any use, reproduction, or disclosure without the written
5  * permission of NVIDIA Corporation is prohibited.
6  */
7 
16 #ifndef NVMEDIA_SURFACE_H
17 #define NVMEDIA_SURFACE_H
18 
19 #ifdef __cplusplus
20 extern "C" {
21 #endif
22 
23 #include "nvmedia_core.h"
24 
44 #define NVMEDIA_SURFACE_VERSION_MAJOR (1u)
45 
46 #define NVMEDIA_SURFACE_VERSION_MINOR (18u)
47 
48 
55 typedef enum {
87 
90 #define NVM_SURF_ATTR_SURF_TYPE_YUV (0x00000001u)
91 
92 #define NVM_SURF_ATTR_SURF_TYPE_RGBA (0x00000002u)
93 
94 #define NVM_SURF_ATTR_SURF_TYPE_RAW (0x00000003u)
95 
98 #define NVM_SURF_ATTR_LAYOUT_BL (0x00000001u)
99 
100 #define NVM_SURF_ATTR_LAYOUT_PL (0x00000002u)
101 
104 #define NVM_SURF_ATTR_DATA_TYPE_UINT (0x00000001u)
105 
106 #define NVM_SURF_ATTR_DATA_TYPE_INT (0x00000002u)
107 
108 #define NVM_SURF_ATTR_DATA_TYPE_FLOAT (0x00000003u)
109 
110 #define NVM_SURF_ATTR_DATA_TYPE_FLOATISP (0x00000004u)
111 
114 #define NVM_SURF_ATTR_MEMORY_PLANAR (0x00000001u)
115 
116 #define NVM_SURF_ATTR_MEMORY_SEMI_PLANAR (0x00000002u)
117 
118 #define NVM_SURF_ATTR_MEMORY_PACKED (0x00000003u)
119 
124 #define NVM_SURF_ATTR_SUB_SAMPLING_TYPE_420 (0x00000001u)
125 
126 #define NVM_SURF_ATTR_SUB_SAMPLING_TYPE_422 (0x00000002u)
127 
128 #define NVM_SURF_ATTR_SUB_SAMPLING_TYPE_444 (0x00000003u)
129 
130 #define NVM_SURF_ATTR_SUB_SAMPLING_TYPE_422R (0x00000004u)
131 
132 #define NVM_SURF_ATTR_SUB_SAMPLING_TYPE_NONE (0x00000000u)
133 
138 #define NVM_SURF_ATTR_BITS_PER_COMPONENT_8 (0x00000001u)
139 
140 #define NVM_SURF_ATTR_BITS_PER_COMPONENT_10 (0x00000002u)
141 
142 #define NVM_SURF_ATTR_BITS_PER_COMPONENT_12 (0x00000003u)
143 
144 #define NVM_SURF_ATTR_BITS_PER_COMPONENT_14 (0x00000004u)
145 
146 #define NVM_SURF_ATTR_BITS_PER_COMPONENT_16 (0x00000005u)
147 
148 #define NVM_SURF_ATTR_BITS_PER_COMPONENT_32 (0x00000006u)
149 
151 #define NVM_SURF_ATTR_BITS_PER_COMPONENT_LAYOUT_16_8_8 (0x00000007u)
152 
153 #define NVM_SURF_ATTR_BITS_PER_COMPONENT_LAYOUT_10_8_8 (0x00000008u)
154 
155 #define NVM_SURF_ATTR_BITS_PER_COMPONENT_LAYOUT_2_10_10_10 (0x00000009u)
156 
157 #define NVM_SURF_ATTR_BITS_PER_COMPONENT_20 (0x0000000Au)
158 
161 #define NVM_SURF_ATTR_COMPONENT_ORDER_LUMA (0x00000001u)
162 
163 #define NVM_SURF_ATTR_COMPONENT_ORDER_YUV (0x00000002u)
164 
165 #define NVM_SURF_ATTR_COMPONENT_ORDER_YVU (0x00000003u)
166 
167 #define NVM_SURF_ATTR_COMPONENT_ORDER_YUYV (0x00000004u)
168 
169 #define NVM_SURF_ATTR_COMPONENT_ORDER_YVYU (0x00000005u)
170 
171 #define NVM_SURF_ATTR_COMPONENT_ORDER_VYUY (0x00000006u)
172 
173 #define NVM_SURF_ATTR_COMPONENT_ORDER_UYVY (0x00000007u)
174 
175 #define NVM_SURF_ATTR_COMPONENT_ORDER_XUYV (0x00000008u)
176 
177 #define NVM_SURF_ATTR_COMPONENT_ORDER_XYUV (0x00000009u)
178 
179 #define NVM_SURF_ATTR_COMPONENT_ORDER_VUYX (0x0000000Au)
180 
183 #define NVM_SURF_ATTR_COMPONENT_ORDER_ALPHA (0x00000011u)
184 
185 #define NVM_SURF_ATTR_COMPONENT_ORDER_RGBA (0x00000012u)
186 
187 #define NVM_SURF_ATTR_COMPONENT_ORDER_ARGB (0x00000013u)
188 
189 #define NVM_SURF_ATTR_COMPONENT_ORDER_BGRA (0x00000014u)
190 
191 #define NVM_SURF_ATTR_COMPONENT_ORDER_RG (0x00000015u)
192 
195 #define NVM_SURF_ATTR_COMPONENT_ORDER_RGGB (0x00000021u)
196 
197 #define NVM_SURF_ATTR_COMPONENT_ORDER_BGGR (0x00000022u)
198 
199 #define NVM_SURF_ATTR_COMPONENT_ORDER_GRBG (0x00000023u)
200 
201 #define NVM_SURF_ATTR_COMPONENT_ORDER_GBRG (0x00000024u)
202 
204 #define NVM_SURF_ATTR_COMPONENT_ORDER_RCCB (0x00000025u)
205 
206 #define NVM_SURF_ATTR_COMPONENT_ORDER_BCCR (0x00000026u)
207 
208 #define NVM_SURF_ATTR_COMPONENT_ORDER_CRBC (0x00000027u)
209 
210 #define NVM_SURF_ATTR_COMPONENT_ORDER_CBRC (0x00000028u)
211 
213 #define NVM_SURF_ATTR_COMPONENT_ORDER_RCCC (0x00000029u)
214 
215 #define NVM_SURF_ATTR_COMPONENT_ORDER_CCCR (0x0000002Au)
216 
217 #define NVM_SURF_ATTR_COMPONENT_ORDER_CRCC (0x0000002Bu)
218 
219 #define NVM_SURF_ATTR_COMPONENT_ORDER_CCRC (0x0000002Cu)
220 
222 #define NVM_SURF_ATTR_COMPONENT_ORDER_CCCC (0x0000002Du)
223 
226 #define NVM_SURF_ATTR_COMPONENT_ORDER_BGGI_RGGI (0x0000002Eu)
227 
228 #define NVM_SURF_ATTR_COMPONENT_ORDER_GBIG_GRIG (0x0000002Fu)
229 
230 #define NVM_SURF_ATTR_COMPONENT_ORDER_GIBG_GIRG (0x00000030u)
231 
232 #define NVM_SURF_ATTR_COMPONENT_ORDER_IGGB_IGGR (0x00000031u)
233 
234 #define NVM_SURF_ATTR_COMPONENT_ORDER_RGGI_BGGI (0x00000032u)
235 
236 #define NVM_SURF_ATTR_COMPONENT_ORDER_GRIG_GBIG (0x00000033u)
237 
238 #define NVM_SURF_ATTR_COMPONENT_ORDER_GIRG_GIBG (0x00000034u)
239 
240 #define NVM_SURF_ATTR_COMPONENT_ORDER_IGGR_IGGB (0x00000035u)
241 
245 typedef struct {
249  uint32_t value;
251 
255 #define NVM_SURF_FMT_DEFINE_ATTR(x) \
256  NvMediaSurfFormatAttr x[7] = { \
257  { \
258  .type = NVM_SURF_ATTR_SURF_TYPE, \
259  .value = 0u, \
260  }, \
261  { \
262  .type = NVM_SURF_ATTR_LAYOUT, \
263  .value = 0u, \
264  }, \
265  { \
266  .type = NVM_SURF_ATTR_DATA_TYPE, \
267  .value = 0u, \
268  }, \
269  { \
270  .type = NVM_SURF_ATTR_MEMORY, \
271  .value = 0u, \
272  }, \
273  { \
274  .type = NVM_SURF_ATTR_SUB_SAMPLING_TYPE, \
275  .value = 0u, \
276  }, \
277  { \
278  .type = NVM_SURF_ATTR_BITS_PER_COMPONENT, \
279  .value = 0u, \
280  }, \
281  { \
282  .type = NVM_SURF_ATTR_COMPONENT_ORDER, \
283  .value = 0u, \
284  }, \
285  }; \
286 
287 
295 #define NVM_SURF_FMT_SET_ATTR_YUV(attr, order, samplingtype, memory, datatype, bpc, layout) \
296 { \
297  attr[0].type = NVM_SURF_ATTR_SURF_TYPE; \
298  attr[0].value = NVM_SURF_ATTR_SURF_TYPE_YUV; \
299  \
300  attr[1].type = NVM_SURF_ATTR_LAYOUT; \
301  attr[1].value = NVM_SURF_ATTR_LAYOUT_##layout; \
302  \
303  attr[2].type = NVM_SURF_ATTR_DATA_TYPE; \
304  attr[2].value = NVM_SURF_ATTR_DATA_TYPE_##datatype; \
305  \
306  attr[3].type = NVM_SURF_ATTR_MEMORY; \
307  attr[3].value = NVM_SURF_ATTR_MEMORY_##memory; \
308  \
309  attr[4].type = NVM_SURF_ATTR_SUB_SAMPLING_TYPE; \
310  attr[4].value = NVM_SURF_ATTR_SUB_SAMPLING_TYPE_##samplingtype; \
311  \
312  attr[5].type = NVM_SURF_ATTR_BITS_PER_COMPONENT; \
313  attr[5].value = NVM_SURF_ATTR_BITS_PER_COMPONENT_##bpc; \
314  \
315  attr[6].type = NVM_SURF_ATTR_COMPONENT_ORDER; \
316  attr[6].value = NVM_SURF_ATTR_COMPONENT_ORDER_##order; \
317 }
318 
324 #define NVM_SURF_FMT_SET_ATTR_RGBA(attr, order, datatype, bpc, layout) \
325 { \
326  attr[0].type = NVM_SURF_ATTR_SURF_TYPE; \
327  attr[0].value = NVM_SURF_ATTR_SURF_TYPE_RGBA; \
328  \
329  attr[1].type = NVM_SURF_ATTR_LAYOUT; \
330  attr[1].value = NVM_SURF_ATTR_LAYOUT_##layout; \
331  \
332  attr[2].type = NVM_SURF_ATTR_DATA_TYPE; \
333  attr[2].value = NVM_SURF_ATTR_DATA_TYPE_##datatype; \
334  \
335  attr[3].type = NVM_SURF_ATTR_MEMORY; \
336  attr[3].value = NVM_SURF_ATTR_MEMORY_PACKED; \
337  \
338  attr[4].type = NVM_SURF_ATTR_SUB_SAMPLING_TYPE; \
339  attr[4].value = NVM_SURF_ATTR_SUB_SAMPLING_TYPE_NONE; \
340  \
341  attr[5].type = NVM_SURF_ATTR_BITS_PER_COMPONENT; \
342  attr[5].value = NVM_SURF_ATTR_BITS_PER_COMPONENT_##bpc; \
343  \
344  attr[6].type = NVM_SURF_ATTR_COMPONENT_ORDER; \
345  attr[6].value = NVM_SURF_ATTR_COMPONENT_ORDER_##order; \
346 }
347 
352 #define NVM_SURF_FMT_SET_ATTR_RAW(attr, order, datatype, bpc, layout) \
353 { \
354  attr[0].type = NVM_SURF_ATTR_SURF_TYPE; \
355  attr[0].value = NVM_SURF_ATTR_SURF_TYPE_RAW; \
356  \
357  attr[1].type = NVM_SURF_ATTR_LAYOUT; \
358  attr[1].value = NVM_SURF_ATTR_LAYOUT_##layout; \
359  \
360  attr[2].type = NVM_SURF_ATTR_DATA_TYPE; \
361  attr[2].value = NVM_SURF_ATTR_DATA_TYPE_##datatype; \
362  \
363  attr[3].type = NVM_SURF_ATTR_MEMORY; \
364  attr[3].value = NVM_SURF_ATTR_MEMORY_PACKED; \
365  \
366  attr[4].type = NVM_SURF_ATTR_SUB_SAMPLING_TYPE; \
367  attr[4].value = NVM_SURF_ATTR_SUB_SAMPLING_TYPE_NONE; \
368  \
369  attr[5].type = NVM_SURF_ATTR_BITS_PER_COMPONENT; \
370  attr[5].value = NVM_SURF_ATTR_BITS_PER_COMPONENT_##bpc; \
371  \
372  attr[6].type = NVM_SURF_ATTR_COMPONENT_ORDER; \
373  attr[6].value = NVM_SURF_ATTR_COMPONENT_ORDER_##order; \
374 }
375 
387 typedef enum {
427 
431 #define NVM_SURF_ATTR_MIN_WIDTH (16U)
432 
433 #define NVM_SURF_ATTR_MAX_WIDTH (16384U)
434 
438 #define NVM_SURF_ATTR_MIN_HEIGHT (16U)
439 
440 #define NVM_SURF_ATTR_MAX_HEIGHT (16384U)
441 
445 #define NVM_SURF_ATTR_MIN_EMB_LINES_TOP (0U)
446 
447 #define NVM_SURF_ATTR_MAX_EMB_LINES_TOP (128U)
448 
452 #define NVM_SURF_ATTR_MIN_EMB_LINES_BOTTOM (0U)
453 
454 #define NVM_SURF_ATTR_MAX_EMB_LINES_BOTTOM (128U)
455 
459 #define NVM_SURF_ATTR_CPU_ACCESS_UNCACHED (0x00000001u)
460 
461 #define NVM_SURF_ATTR_CPU_ACCESS_CACHED (0x00000002u)
462 
463 #define NVM_SURF_ATTR_CPU_ACCESS_UNMAPPED (0x00000003u)
464 
468 #define NVM_SURF_ATTR_ALLOC_DEFAULT (0x00000000u)
469 
470 #define NVM_SURF_ATTR_ALLOC_ISOCHRONOUS (0x00000001u)
471 
472 #define NVM_SURF_ATTR_ALLOC_SECURED (0x00000002u)
473 
477 #define NVM_SURF_ATTR_ALLOC_DEFAULT (0x00000000u)
478 
479 #define NVM_SURF_ATTR_SCAN_PROGRESSIVE (0x00000001u)
480 
481 #if !defined(NV_IS_SAFETY) || (!NV_IS_SAFETY)
482 
486 #define NVM_SURF_ATTR_SCAN_INTERLACED (0x00000002u)
487 #endif
488 
494 #define NVM_SURF_ATTR_COLOR_STD_SRGB (0x00000001u)
495 
498 #define NVM_SURF_ATTR_COLOR_STD_REC601_SR (0x00000002u)
499 
502 #define NVM_SURF_ATTR_COLOR_STD_REC601_ER (0x00000003u)
503 
506 #define NVM_SURF_ATTR_COLOR_STD_REC709_SR (0x00000004u)
507 
510 #define NVM_SURF_ATTR_COLOR_STD_REC709_ER (0x00000005u)
511 
516 #define NVM_SURF_ATTR_COLOR_STD_REC2020_RGB (0x00000006u)
517 
522 #define NVM_SURF_ATTR_COLOR_STD_REC2020_SR (0x00000007u)
523 
528 #define NVM_SURF_ATTR_COLOR_STD_REC2020_ER (0x00000008u)
529 
534 #define NVM_SURF_ATTR_COLOR_STD_YcCbcCrc_SR (0x00000009u)
535 
540 #define NVM_SURF_ATTR_COLOR_STD_YcCbcCrc_ER (0x0000000Au)
541 
548 #define NVM_SURF_ATTR_COLOR_STD_SENSOR_RGBA (0x0000000Bu)
549 
553 #define NVM_SURF_ATTR_COLOR_STD_REC2020PQ_ER (0x0000000Cu)
554 
558 typedef struct {
562  uint32_t value;
564 
568 #define NvMediaSurfaceType uint32_t
569 
571 #define NvMediaSurfaceType_Unsupported (99999u)
572 
573 #if (NV_IS_SAFETY == 0)
574 
582 #define NvMediaSurfaceType_Video_420 (1000u)
583 #define NvMediaSurfaceType_Video_420_10bit (1001u)
584 #define NvMediaSurfaceType_Video_420_12bit (1002u)
585 
588 #define NvMediaSurfaceType_Video_422 (1003u)
589 #define NvMediaSurfaceType_Video_422_10bit (1004u)
590 #define NvMediaSurfaceType_Video_422_12bit (1005u)
591 
594 #define NvMediaSurfaceType_Video_444 (1006u)
595 #define NvMediaSurfaceType_Video_444_10bit (1007u)
596 #define NvMediaSurfaceType_Video_444_12bit (1008u)
597 
598 #define NvMediaSurfaceType_VideoCapture_422 (1009u)
599 
600 #define NvMediaSurfaceType_VideoCapture_YUYV_422 (1010u)
601 
602 #define NvMediaSurfaceType_R8G8B8A8 (1011u)
603 
606 #define NvMediaSurfaceType_R8G8B8A8_BottomOrigin (1012u)
607 
608 #define NvMediaSurfaceType_Image_Monochrome (1013u)
609 
610 #define NvMediaSurfaceType_Image_YUV_420 (1014u)
611 
612 #define NvMediaSurfaceType_Image_YUV_422 (1015u)
613 
614 #define NvMediaSurfaceType_Image_YUV_444 (1016u)
615 
616 #define NvMediaSurfaceType_Image_YUYV_422 (1017u)
617 
618 #define NvMediaSurfaceType_Image_RGBA (1018u)
619 
620 #define NvMediaSurfaceType_Image_RAW (1019u)
621 
622 #define NvMediaSurfaceType_Image_V16Y16U16X16 (1020u)
623 
624 #define NvMediaSurfaceType_Image_Y16 (1021u)
625 
626 #define NvMediaSurfaceType_Image_X2U10Y10V10 (1022u)
627 
628 #define NvMediaSurfaceType_Image_Y10U8V8_420 (1023u)
629 
630 #define NvMediaSurfaceType_Image_Y10 (1024u)
631 
632 #define NvMediaSurfaceType_A8 (1025u)
633 
635 #define NvMediaSurfaceType_YV12 NvMediaSurfaceType_Video_420
636 
637 #define NvMediaSurfaceType_YV16 NvMediaSurfaceType_Video_422
638 
639 #define NvMediaSurfaceType_YV24 NvMediaSurfaceType_Video_444
640 
641 #define NvMediaSurfaceType_YV16x2 NvMediaSurfaceType_VideoCapture_422
642 #endif
643 
668  const NvMediaSurfFormatAttr *attrs,
669  uint32_t numAttrs
670 );
671 
702  NvMediaSurfaceType type,
703  NvMediaSurfFormatAttr *attrs,
704  uint32_t numAttrs
705 );
706 
728  NvMediaVersion *version
729 );
730 
731 /*
732  * \defgroup history_nvmedia_surface History
733  * Provides change history for the NvMedia Surface API.
734  *
735  * \section history_nvmedia_surface Version History
736  *
737  * <b> Version 1.0 </b> March 1, 2017
738  * - Initial release
739  *
740  *
741  * <b> Version 1.1 </b> April 24, 2017
742  * - Added NVM_SURF_ATTR_COMPONENT_ORDER_XYUV and
743  * NVM_SURF_ATTR_COMPONENT_ORDER_RG component order flags
744  *
745  * <b> Version 1.2 </b> May 18, 2017
746  * - Added NVM_SURF_ATTR_COLOR_STD_TYPE and
747  * NVM_SURF_ATTR_COLOR_STD flags
748  *
749  * <b> Version 1.3 </b> June 08, 2017
750  * - Removed NvMediaSurfaceType_Image_NonColor_S16_XY and
751  * NvMediaSurfaceType_Image_NonColor_S16_X surface types
752  *
753  * <b> Version 1.4 </b> June 12, 2017
754  * - Added NVM_SURF_ATTR_COMPONENT_ORDER_VUYX flag
755  *
756  * <b> Version 1.5 </b> October 09, 2017
757  * - Added NVM_SURF_ATTR_COLOR_STD_SENSOR_RGBA and
758  * NVM_SURF_ATTR_COLOR_STD_REC2020PQ_ER flags
759  *
760  * <b> Version 1.6 </b> October 31, 2017
761  * - Added NVM_SURF_ATTR_DATA_TYPE_FLOATISP type
762  *
763  * <b> Version 1.7 </b> November 07, 2017
764  * - Added NVM_SURF_ATTR_BITS_PER_COMPONENT_20
765  *
766  * <b> Version 1.8 </b> June 04, 2018
767  * - Added NVM_SURF_ATTR_COMPONENT_ORDER_CCCC component order
768  *
769  * <b> Version 1.9 </b> July 10, 2018
770  * - Added NvMediaSurfaceGetVersion API
771  *
772  * <b> Version 1.10 </b> December 11, 2018
773  * - Fixed MISRA-C rule 10.4, 20.7 and 21.1 violations
774  * resulting from this header.
775  *
776  * <b> Version 1.11 </b> December 03, 2019
777  * - Updated the comments to deprecate old NvMediaSurfaceType_ macros
778  *
779  * <b> Version 1.12 </b> March 22, 2019
780  * - Fixed MISRA-C rule 8.13 violations
781  * resulting from this header.
782  *
783  * <b> Version 1.13 </b> November 27, 2019
784  * - Fixed MISRA-C rule 4.6 violations by changing unsigned int
785  * arguments and struct members to uint32_t type.
786  *
787  * <b> Version 1.14 </b> December 4, 2019
788  * - Fixed MISRA-C rule 2.5 violations by defining non-safety
789  * surface types under non-safety conditional compilation macro.
790  *
791  * <b> Version 1.15 </b> September 2, 2020
792  * - Added 8 component flags for RAW RGB-IR surface type
793  *
794  * <b> Version 1.16 </b> February 25, 2021
795  * - Added array size for NvMediaSurfFormatAttr
796  *
797  * <b> Version 1.17 </b> August 30, 2021
798  * - Update doxygen comments for all APIs to have Thread safety information and API Group information
799  *
800  * <b> Version 1.18 </b> September 13, 2021
801  * - SWUD Update for 5.2 Release.
802  */
805 #ifdef __cplusplus
806 } /* extern "C" */
807 #endif
808 
809 #endif /* NVMEDIA_SURFACE_H */
NVM_SURF_ATTR_DATA_TYPE
@ NVM_SURF_ATTR_DATA_TYPE
Specifies the surface data type.
Definition: nvmedia_surface.h:67
nvmedia_core.h
NVIDIA Media Interface: Core
NvMediaSurfFormatAttr::value
uint32_t value
Holds surface format attribute value.
Definition: nvmedia_surface.h:249
NvMediaSurfAllocAttrType
NvMediaSurfAllocAttrType
Defines NvMedia Surface allocation attribute types.
Definition: nvmedia_surface.h:387
NvMediaSurfAllocAttr::type
NvMediaSurfAllocAttrType type
Holds the surface allocation attribute type.
Definition: nvmedia_surface.h:560
NvMediaSurfFormatAttr
Holds NvMedia Surface format attributes.
Definition: nvmedia_surface.h:245
NVM_SURF_FMT_ATTR_MAX
@ NVM_SURF_FMT_ATTR_MAX
Specifies the maximum number of surface format attributes.
Definition: nvmedia_surface.h:85
NVM_SURF_ATTR_SURF_TYPE
@ NVM_SURF_ATTR_SURF_TYPE
Specifies the surface type.
Definition: nvmedia_surface.h:59
NVM_SURF_ATTR_SCAN_TYPE
@ NVM_SURF_ATTR_SCAN_TYPE
Specifies the surface scan type.
Definition: nvmedia_surface.h:417
NVM_SURF_ATTR_WIDTH
@ NVM_SURF_ATTR_WIDTH
Specifies the surface width.
Definition: nvmedia_surface.h:390
NvMediaVersion
Holds NvMedia version information.
Definition: tvmr/include/nvmedia_core.h:237
NVM_SURF_ATTR_PEER_VM_ID
@ NVM_SURF_ATTR_PEER_VM_ID
Specifies the peer VM ID in case of shared buffers.
Definition: nvmedia_surface.h:413
NVM_SURF_ATTR_EMB_LINES_BOTTOM
@ NVM_SURF_ATTR_EMB_LINES_BOTTOM
Specifies the embedded lines bottom.
Definition: nvmedia_surface.h:401
NVM_SURF_ALLOC_ATTR_MAX
@ NVM_SURF_ALLOC_ATTR_MAX
Specifies the maximum number of surface allocation attributes.
Definition: nvmedia_surface.h:425
NVM_SURF_ATTR_LAYOUT
@ NVM_SURF_ATTR_LAYOUT
Specifies the surface layout type.
Definition: nvmedia_surface.h:63
NvMediaSurfaceFormatGetAttrs
NvMediaStatus NvMediaSurfaceFormatGetAttrs(NvMediaSurfaceType type, NvMediaSurfFormatAttr *attrs, uint32_t numAttrs)
Gets NvMediaSurfFormatAttr for the input surface type.
NvMediaSurfaceType
#define NvMediaSurfaceType
Defines the set of NvMedia surface types.
Definition: nvmedia_surface.h:568
NVM_SURF_ATTR_HEIGHT
@ NVM_SURF_ATTR_HEIGHT
Specifies the surface height (excluding embedded data lines).
Definition: nvmedia_surface.h:393
NvMediaSurfAllocAttr::value
uint32_t value
Holds the surface allocation attribute value.
Definition: nvmedia_surface.h:562
NvMediaSurfaceFormatGetType
NvMediaSurfaceType NvMediaSurfaceFormatGetType(const NvMediaSurfFormatAttr *attrs, uint32_t numAttrs)
Gets NvMediaSurfaceType for the input NvMediaSurfFormatAttr.
NvMediaSurfaceGetVersion
NvMediaStatus NvMediaSurfaceGetVersion(NvMediaVersion *version)
Gets the surface version information for the NvMediaSurface component.
NvMediaSurfFormatAttrType
NvMediaSurfFormatAttrType
Defines NvMedia Surface format attribute types.
Definition: nvmedia_surface.h:55
NVM_SURF_ATTR_ALLOC_TYPE
@ NVM_SURF_ATTR_ALLOC_TYPE
Specifies the allocation type.
Definition: nvmedia_surface.h:410
NvMediaStatus
NvMediaStatus
Defines all possible error codes.
Definition: tvmr/include/nvmedia_core.h:180
NVM_SURF_ATTR_CPU_ACCESS
@ NVM_SURF_ATTR_CPU_ACCESS
Specifies the CPU access to surface flags.
Definition: nvmedia_surface.h:406
NVM_SURF_ATTR_COLOR_STD_TYPE
@ NVM_SURF_ATTR_COLOR_STD_TYPE
Specifies the color standard type.
Definition: nvmedia_surface.h:423
NVM_SURF_ATTR_BITS_PER_COMPONENT
@ NVM_SURF_ATTR_BITS_PER_COMPONENT
Specifies bits per component.
Definition: nvmedia_surface.h:79
NvMediaSurfAllocAttr
Holds NvMedia Surface allocation attributes.
Definition: nvmedia_surface.h:558
NVM_SURF_ATTR_COMPONENT_ORDER
@ NVM_SURF_ATTR_COMPONENT_ORDER
Specifies the Pixel order.
Definition: nvmedia_surface.h:83
NVM_SURF_ATTR_SUB_SAMPLING_TYPE
@ NVM_SURF_ATTR_SUB_SAMPLING_TYPE
Specifies the surface sub sampling type.
Definition: nvmedia_surface.h:75
NVM_SURF_ATTR_EMB_LINES_TOP
@ NVM_SURF_ATTR_EMB_LINES_TOP
Specifies the embedded lines top.
Definition: nvmedia_surface.h:397
NVM_SURF_ATTR_MEMORY
@ NVM_SURF_ATTR_MEMORY
Specifies the surface memory type flags.
Definition: nvmedia_surface.h:71
NvMediaSurfFormatAttr::type
NvMediaSurfFormatAttrType type
Holds surface format attribute type.
Definition: nvmedia_surface.h:247