Camera Device Tree#

The Device Tree stores platform-specific configurations for system resources used by Camera, which provides and regulates access to Camera FW resources, I2C, GPIO, powercontrol and synchronization signal generation functionalities among clients.

The properties are consumed by the Camera Linux KMD, composed of the cdi-mgr and cdi-tsc modules.

On DriveOS Linux, the platform configuration for Camera IP (such as RCE, NVCSI, VI, ISP) is part of the Host1x Device Tree node and documented in the NvMedia Device Tree Documentation.

Resource Block Configuration#

The sipl_devblk_X nodes contain the configuration for each resource block, which are software representations of deserializer groups in hardware. The X should denote the ID for the dedicated I2C bus of each deserializer block. GPIO pins for ordinary input and output, and interrupts are also configured in this node.

sipl_devblk_0 {
   status = "okay";
   compatible = "nvidia,cdi-mgr";

   tegra {
      i2c-bus = <0>;
      csi-port = <0>;

      interrupt-parent = <&tegra_main_gpio>;
      interrupts = <TEGRA234_MAIN_GPIO(P, 5) 2>; /* GMSLA_STATUS_OC :
                                                    falling edge sensitive */

      gpios {
         gpio@0 {
            index = <0>;
            nvgpio-line = <&nvgpio_errb_lock_err_a>; intr-edge-falling;
         };
         gpio@1 {
            index = <1>;
            nvgpio-line = <&nvgpio_cam_err_a>; intr-edge-rising;
         };


         i2c_addr_pools {

            i2c-addrs-phys =
               <0x0 7>,
               <0x10 1>,
               <0x18 1>;

            i2c-addrs-virt =
               <0x43 12>,
               <0x57 8>,
               <0x65 12>;
         };

         deserializer {
            addr = <0x29>;            /* 7 bit slave address */
            reg_len = <16>;           /* 16 bit register length */
            dat_len = <8>;            /* 8 bit data length */
            des_i2c_port = <0>;       /* I2C port number of the deserializer */
            dphy_rate_x2 = <2500000>; /* Data rate in DPHY x2. Unit size is kbps */
            dphy_rate_x4 = <2500000>; /* Data rate in DPHY x4. Unit size is kbps */
            cphy_rate_x2 = <2000000>; /* Data rate in CPHY x2. Unit size is ksps */
            cphy_rate_x4 = <2000000>; /* Data rate in CPHY x4. Unit size is ksps */
            gid = <3870>;             /* Owning GID (Deserializer) */
            links = <0 1 2 3>;        /* Number and indices of valid links */
            links_gid = <3870>;       /* Owning GID (Deserializer's links) */

            /* des_tx_port = <0>;*/   /* CSI Tx port number. Define des_tx_port only
                                         if the dedicated output Tx port is required */
         };

         pwr_ctrl {
            power_port = <0>;
         };
      };
    };
 };