NvGPU Device Tree

The NvGPU driver uses the following Device tree nodes and properties. Properties customizable are marked accordingly for each property used. Nodes used in NvGPU drivers for Linux are as follows.

Note that for Thor SOC, GPU (gb10b) is a PCIe device. Node gpu@0,0 under pci@0,0 under pcie@d0b0000000 – gpu@0,0 node, contains configuration parameters needed for initializing the NvGPU driver.

pcie@d0b0000000 {
    ...
    pci@0,0 {
        ...
        gpu@0,0 {
            reg = <0x0000 0 0 0 0>;

            power-domains = <&bpmp TEGRA264_POWER_DOMAIN_GPU>;

            clocks = <&bpmp TEGRA264_CLK_GPU_UPROC>,
                     <&bpmp TEGRA264_CLK_GPU_SYS>,
                     <&bpmp TEGRA264_CLK_GPU_GPC0>,
                     <&bpmp TEGRA264_CLK_GPU_GPC1>,
                     <&bpmp TEGRA264_CLK_GPU_GPC2>,
                     <&bpmp TEGRA264_CLK_GPU_NVD>;
            clock-names = "uprocclk", "sysclk", "gpc0clk", "gpc1clk", "gpc2clk", "nvdclk";

            interconnects = <&mc TEGRA264_MEMORY_CLIENT_GPUR02MC &emc>,
                            <&mc TEGRA264_MEMORY_CLIENT_GPUW02MC &emc>,
                            <&mc TEGRA264_MEMORY_CLIENT_NVDECSRD2MC &emc>,
                            <&mc TEGRA264_MEMORY_CLIENT_NVDECSWR2MC &emc>;
            interconnect-names = "gpu-read", "gpu-write", "video-read", "video-write";

            dma-coherent;

            nvidia,bpmp = <&bpmp>;
        };
    };
};

Description: - ‘reg’ Dummy entry for physical base address and length of the controller’s registers.

Customizable: No

Optional: No

Value: Must contain one entry.

power-domains-

Description: Generic Power Domains (genpd). Available in k4.14 onwards. bpmp manages power gating for GPUs if this entry is present in the DT.

Customizable: No

Optional: No

Value:

<&bpmp TEGRA264_POWER_DOMAIN_GPU>

Clocks

Description: clocks holds the type of clocks ids supported by gb10b.

Customizable: No

Optional: No

Value:

<&bpmp TEGRA264_CLK_GPU_UPROC>,
<&bpmp TEGRA264_CLK_GPU_SYS>,
<&bpmp TEGRA264_CLK_GPU_GPC0>,
<&bpmp TEGRA264_CLK_GPU_GPC1>,
<&bpmp TEGRA264_CLK_GPU_GPC2>,
<&bpmp TEGRA264_CLK_GPU_NVD>;

clock-names

Description: List of clock input name strings sorted in the same order as the clocks property. Consumer’s drivers will use clock-names to match clock input names with clocks specifiers

Customizable: No

Optional: Yes

Value:

"uprocclk", "sysclk", "gpc0clk", "gpc1clk", "gpc2clk", "nvdclk"

interconnects

Description: List of phandle and MC node specifier pairs, one pair for each MC client signal that affects the device, or that the device manages.

Customizable: No

Optional: No

Value:

<&mc TEGRA264_MEMORY_CLIENT_GPUR02MC &emc>,
<&mc TEGRA264_MEMORY_CLIENT_GPUW02MC &emc>,
<&mc TEGRA264_MEMORY_CLIENT_NVDECSRD2MC &emc>,
<&mc TEGRA264_MEMORY_CLIENT_NVDECSWR2MC &emc>;

interconnect-names

Description: List of MC client input name strings sorted in the same order as the interconnects property. Consumer’s drivers will use interconnect-names to match MC client input names with MC client specifiers.

Customizable: No

Optional: Yes

Value:

::

“gpu-read”, “gpu-write”, “video-read”, “video-write”

dma-coherent

Description: Present if DMA operations are coherent.

Customizable: No

Optional: Yes

Value: N/A

nvidia,bpmp

Description: bpmp device phandle, needed for powergating support.

Customizable: No

Optional: No

Value: bpmp

Following two properties are defined in guest OS DT overlay/override files.

support-gpu-tools

Description: Knob to control dbg/prof support.

Customizable: Yes

Optional: Yes

Value: Value 1 depicts that dbg/prof support is enabled. Absence or other value means support is disabled, which skips support for the following nodes:

1. ctxsw 2. dbg 3. prof 4. prof-dev 5. prof-ctx

Status

Description: status holds the NVGPU status.

Customizable: No

Optional: No

Value: “okay” or “disabled”