Tegra Time Sync#

Tegra Time Sync consists of the following components:

  • linuxptp daemon (ptp4l) in Client mode: Synchronizes the Ethernet MAC time with external GTM time.

  • linuxptp daemon (ptp4l) in Master mode: Forwards the synchronized Ethernet MAC time to devices connected to this MAC.

  • PTP–TSC hardware synchronization: Aligns the TSC with the PHC increment rate, using a PPS signal from the MAC. This alignment is needed for the camera Fsync at PTP second boundaries.

  • PTP bridge within Tegra (MAC-to-MAC): Allows other MACs in Tegra to synchronize with GM time through the primary MAC. This supports time-aware clients such as LiDAR sensors connected via different MACs.

  • NvPPS (Time Correlation Module): Captures and correlates timestamps across multiple time domains (CCPLEX, TSC, PTP, etc.) for upper-layer software consumption.

PTP Support in Tegra#

In the supported PTP topology:

  • One Tegra MAC and its associated PHC must synchronize with an external Grandmaster clock.

  • Once synchronized, the MAC PHC serves as the base time source for: - Internal Tegra clocks that require synchronization or correlation. - System software components that rely on current PTP time.

  • PTP time support extends up to February 7, 2106, 6:27 AM.

AVNU PTP Support#

In NVIDIA DriveOS Linux (AV+L) for Thor:

ptp4l daemon launch on boot

7.0.3.0 onwards by default ptp4l gets launched in prod_nsr and test_nsr builds. For other build variants the command needs to be run manually. Following are the service file and PTP role details.

Network interface name

Service file

PTP daemon lauch command

Description

mgbe3_0

nv_ptp4l_slave_mgbe3_0.service

ptp4l -i mgbe3_0 -f /usr/lib/ptp4l/automotive-slave.cfg

Running slave mode on mgbe3_0 interface

mgbe2_0

nv_ptp4l_master_mgbe2_0.service

ptp4l -i mgbe2_0 -f /usr/lib/ptp4l/automotive-master.cfg

Running master mode on mgbe2_0

mgbe1_0

nv_ptp4l_master_mgbe1_0.service

ptp4l -i mgbe1_0 -f /usr/lib/ptp4l/automotive-master.cfg

Running master mode on mgbe2_0

Between mgbe3_0 and mgbe2_0

nv_phc2sys_mgbe3_0_mgbe1_0.service

phc2sys -s mgbe3_0 -c mgbe2_0 -O 0 –step_threshold=1

Running phc2sys where master clock is mgbe3_0 and slave clock is mgbe2_0, to synchronize the clock of MGBE2 with the clock of MGBE3.

Note

The DT property nvidia,ptp_m2m_role is configured to sync the clock of MGBE1 with the clock of MGBE3, while the “phc2sys” mechanism is used to sync the clock of MGBE2 with the clock of MGBE3.

ptp4l manual launch

  • The linuxptp daemon (ptp4l) runs in client mode with an automotive profile to synchronize the MGBE3 MAC interface with the external GM.

    /usr/sbin/ptp4l -f /usr/lib/ptp4l/automotive-slave.cfg -i mgbe3_0 -p /dev/ptp<X> -m

// where:
// /dev/ptp<X> - PTP device node associated with mgbe3_0

  • For devices connected to the MGBE1 interface, another ptp4l instance can be launched in server mode:

    /usr/sbin/ptp4l -f /usr/lib/ptp4l/automotive-master.cfg -i mgbe1_0 -p /dev/ptp<X> -m

// where:
// /dev/ptp<X> - PTP device node associated with mgbe1_0

To identify the correct PTP device (<X>), use the following command:

ethtool -T <Interface ID>

If ethtool is not installed, install it using:

sudo apt install ethtool

Other PTP Profiles in Tegra#

DriveOS Linux supports the IEEE 802.1AS profile. Support is limited to the software stack running on Tegra, meaning Ethernet MACs that are directly connected to switches on DRIVE AGX SoC development platforms cannot enable this profile. For custom platforms, all Tegra MACs that are not downstream of a switch can support 802.1AS.

IEEE 802.1AS Commands

// Server mode
sudo /usr/sbin/ptp4l -f /usr/lib/ptp4l/gPTP.cfg -p /dev/ptp<X> -i <iface> -m -l7

// Client mode
sudo /usr/sbin/ptp4l -f /usr/lib/ptp4l/gPTP_slave.cfg -p /dev/ptp<X> -i <iface> -m -l7

// where:
// <iface> - Interface name, such as eqos_0, mgbe0_0, or mgbe1_0.
//           (It could also be a VLAN interface above the primary.)
// /dev/ptp<X> - PTP device node associated with the interface.
//               Use `ethtool -T <interface>` to identify the hardware clock instance.

PTP Bridging in Tegra#

Tegra SoCs include five embedded Ethernet MAC controllers. Only one MAC can act as the primary PTP client to synchronize with the external GM. In some use cases, time information from the GM must be forwarded to devices connected through other MACs. To support this, DriveOS implements a lower-layer feature that synchronizes multiple MAC PHCs from the external GM.

Currently, the platform supports synchronization between two MACs per configuration.

Primary (source) and secondary (sink) MAC selection is configured through the device tree. For more information, refer to the device tree binding documentation:

Documentation/devicetree/bindings/platform/tegra/tegra-nvethernet.txt

Note

By default, the MGBE3→ MGBE1 sync is enabled on boot-up.

PTP-TSC Sync#

Tegra SOC provides a hardware assisted mechanism to rate align/sync the TSC (clock/counter) with one of the Tegra SOC Ethernet MAC using the PPS signal from the MAC. This feature is useful in synchronizing camera fsync signals (used for camera frame capture/timestamping) with PTP time in order to reduce the timestamp jitter between sensors timestamped with PTP domain. This feature is also useful for co-relation of TSC and PTP time-domain timestamps (needed for sensor fusion application) as it ensures a fixed offset (no run-time drift) between PTP and TSC counters over the time. The MAC selection for TSC reference is based on the PTP topology of the platform. It must be always the MAC acting as PTP client for External GTM directly or through switch.

PTP time source MAC selection is configurable through NvPPS devicetree configuration.

Note

By default, the MGBE3→ TSC locking enabled in DRIVEOS.

NvPPS#

NvPPS module is Linux kernel module/driver which provide a single point of access to all the user applications to query:

  • Current synchronized PTP time from PHC

  • Event co-related PTP and TSC time domain timestamps

This module is enabled by default in the DRIVEOS kernel.

Operating Mode

NvPPS module has two operating modes.

  1. GPIO/PPS mode : The NvPPS driver takes external 1PPS signal as input from devices like GPS etc.. on Tegra GPIO pin as an event and reads the timestamps from relevant time domains for correlation.

  2. Timer mode: In this mode event for co-relation is based on periodic software timer scheduled inside NvPPS module.

Timer mode is useful when there is no external device like GPS present for 1 PPS signal generation in system design or if their is no provision in platform (e.g P3663) to receive PPS signal through Tegra GPIO.

Userspace exposed interfaces

The module exposes a dev node named as “/dev/nvpps0”. The dev node supports following IOCTL calls:

SN

IOCTL

Description

1

NVPPS_GETTIMESTAMP

Get current timestamps from kernel and PTP time from primary PHC interface

2

NVPPS_GETEVENT

Get correlated timestamps of different time-domains (TSC, PTP etc.) at the last event.

3

NVPPS_GETVERSION

Get NvPPS driver and API versions.

4

NVPPS_GETPARAMS

Get the current NVPPS parameters. Like Operating mode(in GPIO or Timer mode) and TSC timestamp mode(in Nanosec or Counter mode).

For the mode values to be used, please refer ioctl header file mentioned below.

5

NVPPS_SETPARAMS

Set the NvPPS parameters, described in the NVPPS_GETPARAMS section. This IOCTL can be used to update NvPPS parameters in runtime.

Call this IOCTL with this command. Update configuration (operating mode and TSC timestamp mode) are required to set the parameters.

The parameter settings in NvPPS module are common to all client applications.

The data structures required for supporting the IOCTLs are defined in ${NV_WORKSPACE}/drive-linux/kernel/source/oss_src/nvidia-oot/include/uapi/linux/nvpps_ioctl.h.

Kernel space exposed interface

In addition to User space interfaces, NvPPS module exports a kernel API for other kernel modules to get the current synchronized PTP time in kernel. Refer to <top>/drive-linux/kernel/source/oss_src/nvidia-oot/include/linux/nvpps.h.

/*
 * Get PTP time
 * Clients may call this API whenever PTP time is needed.
 * If PTP time source is not registered, returns -EINVAL
 *
 * This API is available irrespective of nvpps dt availablity
 * When nvpps dt node is not present, interface name will
 * default to "eth0".
 */
int nvpps_get_ptp_ts(void *ts)

NvPPS module configuration

NvPPS supports static configuration through its device tree (DT) node. For details, refer to the device tree binding document at:

${NV_WORKSPACE}/drive-linux/kernel/source/oss_src/nvidia-oot/Documentation/devicetree/bindings/nvpps/nvpps.txt

The following properties are available:

  • Primary PTP Interface (primary-emac): Specifies the phandle of the MAC interface connected to the external GM.

  • Secondary PTP Interface (sec-emac): Specifies the phandle of the MAC interface that synchronizes with the primary PTP MAC using PTP bridging.

  • 1PPS Input Pin (nvpps-gpios): Specifies the GPIO pin that receives the 1PPS signal. Refer to the platform-specific NvPPS device tree node documentation for more details.

  • Disable PTP-TSC Synchronization (ptp_tsc_sync_dis): Defines whether to disable TSC synchronization with PTP.

  • PTP-TSC Lock Threshold (ptp_tsc_lock_threshold): Sets the maximum allowed absolute difference between PTP and TSC counters before synchronization is considered lost. - Minimum: 0x1 (1 nanosecond) - Maximum: 0xFFFFFF (approximately 16.77 milliseconds) - Default: 0x4E20 (20,000 nanoseconds) - Resolution: 1 nanosecond

    Example: To set the threshold for 50 microseconds: 1 * 50000 = 0xC350

  • PTP-TSC Sync Trigger Interval (ptp_tsc_sync_trig_interval): Defines the interval (in PPS edge count) after which PTP_TSC synchronization is triggered if TSC is not aligned with PTP. - Minimum: 1 - Maximum: 8 - Default: 1 (sync on every PPS edge)

    Recommendation: Set to 3 to allow TSC to adjust itself to sync with PTP.

  • Timestamp Capture Interval (ts-capture-interval): Defines the internal timer period (in milliseconds) for capturing concurrent timestamps. - Minimum: 100 ms - Maximum: 1000 ms - Default: 1000 ms

  • Initial Event Mode (nvpps-event-mode-init): Defines the initial operating mode (1: GPIO or 2: TIMER) to be set in the NvPPS driver. If this property is not specified and “1PPS Input Pin” property is provided in device-tree then GPIO mode is chosen as default mode. If this property and “1PPS Input Pin” property are not specified then TIMER mode is chosen as default mode. - Minimum: 1 (GPIO mode) - Maximum: 2 (TIMER mode)

Additional PTP PPS Configuration#

NvPPS also relies on the nvidia,pps_op_ctrl property in the primary PTP interface device tree node. This property configures the TSC module to use a higher PPS input frequency from the primary interfact, enabling faster synchronization between TSC and PTP.

Refer to the MAC interface binding documentation at:

Documentation/devicetree/bindings/platform/tegra/tegra-nvethernet.txt

Supported PPS frequencies:

  • 1, 2, 4, 5, and 8

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