External Frame Synchronization Node#

The External Frame Synchronization Node describes the Tegra generated frame synchronization signals (FSYNC) provided to the camera modules. The Device Tree structure is characterized by a primary node with one to four child nodes each representing the four possible independent FSYNC signals that the Tegra can generate.

tsc_sig_gen@c230000 {
    compatible = "nvidia,tegra264-cdi-tsc";
    ranges = <0x0 0x0 0xc230000 0x10000>;
    reg = <0x0 0xc230000 0x0 0x18>;
    #address-cells = <1>;
    #size-cells = <1>;
    status = "okay";

    gen0: generator@380 {
        reg = <0x380 0x80>;
        freq_hz = <30>;
        duty_cycle = <25>;
        offset_ms = <0>;
        status = "okay";
    };

    gen1: generator@400 {
        reg = <0x400 0x80>;
        freq_hz = <30>;
        duty_cycle = <25>;
        offset_ms = <0>;
        status = "okay";
    };

    gen2: generator@480 {
        reg = <0x480 0x80>;
        freq_hz = <30>;
        duty_cycle = <25>;
        offset_ms = <10>;
        status = "okay";
    };

    gen3: generator@500 {
        reg = <0x500 0x80>;
        freq_hz = <60>;
        duty_cycle = <25>;
        offset_ms = <20>;
        status = "okay";
    };
};

fsync-groups {
    status = "disabled";
    fsync-group@0 {
        id = <0>;
        status = "okay";
        generators = <&gen0>, <&gen2>, <&gen3>;
    };
    fsync-group@1 {
        id = <1>;
        status = "okay";
        generators = <&gen1>;
    };
};

TSC_EDGE_OUT Number

Nodes in Device Tree

TSC_EDGE_OUT0

gen0: generator@380

TSC_EDGE_OUT1

gen1: generator@400

TSC_EDGE_OUT2

gen2: generator@480

TSC_EDGE_OUT3

gen3: generator@500

The primary external FSYNC node is described in the following table. All listed properties are required unless otherwise stated.

Property

Value

node name

  • “tsc_sig_gen@c230000” for NVIDIA DRIVE AGX Thor™

  • “tsc_sig_gen@c6a0000” for NVIDIA DRIVE AGX Orin™

compatible

Device identifier - this is required to be the following:

  • “nvidia,tegra264-cdi-tsc” for NVIDIA DRIVE AGX Thor™

  • “nvidia,tegra234-cdi-tsc” for NVIDIA DRIVE AGX Orin™

ranges

List of address translation tuples. This is required to be a single tuple of the following:

  • “<0x0 0x0 0xc230000 0x10000>” for NVIDIA DRIVE AGX Thor™

  • “<0x0 0x0 0xc6a0000 0x10000>” for NVIDIA DRIVE AGX Orin™

reg

List of memory region tuples. This is required to be a single tuple of the following:

  • “<0x0 0xc230000 0x0 0x18>” for NVIDIA DRIVE AGX Thor™

  • “<0x0 0xc6a0000 0x0 0x18>” for NVIDIA DRIVE AGX Orin™

#address-cells

Number of address cells in child reg properties. This is required to be “<1>”.

#size-cells

Number of size cells in child reg properties. This is required to be “<1>”.

status

Status of the node. If FSYNC is used this is required to be “okay”, otherwise “disabled”.

Individual FSYNC generators exist as child nodes which are described in the following table. All listed properties are required unless otherwise stated.

Property

reg

Memory region of the individual TSC Edge Out generator. Valid memory regions for each generator are defined below:

Generator Number

Memory Region

0

<0x380, 0x80>

1

<0x400, 0x80>

2

<0x480, 0x80>

3

<0x500, 0x80>

freq_hz

The frequency of the FSYNC signal to be output by the generator specified in Hertz.

duty_cycle

The duty cycle of the FSYNC signal to be output by the generator. The duty cycle is specified as a percentage ranging from 0 to 100 , exclusive.

offset_ms

The offset of the FSYNC signal to be output by the generator. The offset is specified in milliseconds relative to the collective group of enabled generators.

For example, consider two generators each configured with a frequency of 30Hz and duty cycle of 50%. Furthermore, consider the first generator specifies an offset of 0ms. The second generator specifies an offset of 10ms. As a result of this configuration both generators will produce the same waveform; however, the signal of the second generator will lag behind the first by 10ms.

status

Status of the node. If individual generator represented by this node is used this is required to be “okay”, otherwise “disabled”.

Fsync-groups#

  1. Fsync-groups allow users to logically group individual generators based on intended usage. All generators in a group always start together. Any offsets are relative to only generators in that group. Generators in other groups may be independently started.

  2. Consider the fysync-groups in the device tree fragment above:

1. All generators in group #0 will start at the same time. Generators #2 and #3 will lag 10 and 20ms relative to Generator #0, respectively.

2. The generator in group #1 can be independently started. It does not need to be synchronized with generators in group #0.

  1. It is mandatory that each generator is only part of one group.

Includes subnodes for each fsync-group:

Property

Value

Status

If okay, fsync-groups is used and active groups can be programmed to start generators within the group at a given time. Otherwise, all active generators start with the default start time on startup.

fsync-group@X

The fsync-group@X nodes contains the configuration for individual fsync-group. The X should denote the index of the group.

Property

Value

id

ID of group.

Unique index as an unsigned integer, starting from index 0.

status

Okay if group is enabled, otherwise disabled.

generators

List of phandles of all the generators within the group. All generators within the group are in sync with each other.
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