NVIDIA DRIVE OS Linux SDK API Reference

6.0.9 Release
NvSIPLCapStructs.h
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1 /*
2  * Copyright (c) 2020-2022, NVIDIA CORPORATION. All rights reserved. All
3  * information contained herein is proprietary and confidential to NVIDIA
4  * Corporation. Any use, reproduction, or disclosure without the written
5  * permission of NVIDIA Corporation is prohibited.
6  */
7 
8 #ifndef NVSIPL_CAP_STRUCTS_H
9 #define NVSIPL_CAP_STRUCTS_H
10 
11 #ifdef __cplusplus
12 extern "C" {
13 #endif /* __cplusplus */
14 
27 typedef enum {
52 #if (NV_IS_SAFETY == 0)
53 
69 #endif
72 
73 typedef enum {
118 
119 typedef enum {
133 
134 typedef enum {
140 
142 #define NVSIPL_CAP_MIN_IMAGE_WIDTH 640U
143 
145 #define NVSIPL_CAP_MAX_IMAGE_WIDTH 3848U
146 
148 #define NVSIPL_CAP_MIN_IMAGE_HEIGHT 480U
149 
151 #define NVSIPL_CAP_MAX_IMAGE_HEIGHT 2168U
152 
154 #define NVSIPL_CAP_MIN_FRAME_RATE 10U
155 
157 #define NVSIPL_CAP_MAX_FRAME_RATE 60U
158 
162 #define NVSIPL_PIXEL_ORDER_LUMA (0x00000001U)
163 
164 #define NVSIPL_PIXEL_ORDER_YUV (0x00000002U)
165 
166 #define NVSIPL_PIXEL_ORDER_YVU (0x00000003U)
167 
168 #define NVSIPL_PIXEL_ORDER_YUYV (0x00000004U)
169 
170 #define NVSIPL_PIXEL_ORDER_YVYU (0x00000005U)
171 
172 #define NVSIPL_PIXEL_ORDER_VYUY (0x00000006U)
173 
174 #define NVSIPL_PIXEL_ORDER_UYVY (0x00000007U)
175 
176 #define NVSIPL_PIXEL_ORDER_XUYV (0x00000008U)
177 
178 #define NVSIPL_PIXEL_ORDER_XYUV (0x00000009U)
179 
180 #define NVSIPL_PIXEL_ORDER_VUYX (0x0000000AU)
181 
184 #define NVSIPL_PIXEL_ORDER_ALPHA (0x00000011U)
185 
186 #define NVSIPL_PIXEL_ORDER_RGBA (0x00000012U)
187 
188 #define NVSIPL_PIXEL_ORDER_ARGB (0x00000013U)
189 
190 #define NVSIPL_PIXEL_ORDER_BGRA (0x00000014U)
191 
192 #define NVSIPL_PIXEL_ORDER_RG (0x00000015U)
193 
196 #define NVSIPL_PIXEL_ORDER_RGGB (0x00000021U)
197 
198 #define NVSIPL_PIXEL_ORDER_BGGR (0x00000022U)
199 
200 #define NVSIPL_PIXEL_ORDER_GRBG (0x00000023U)
201 
202 #define NVSIPL_PIXEL_ORDER_GBRG (0x00000024U)
203 
205 #define NVSIPL_PIXEL_ORDER_RCCB (0x00000025U)
206 
207 #define NVSIPL_PIXEL_ORDER_BCCR (0x00000026U)
208 
209 #define NVSIPL_PIXEL_ORDER_CRBC (0x00000027U)
210 
211 #define NVSIPL_PIXEL_ORDER_CBRC (0x00000028U)
212 
214 #define NVSIPL_PIXEL_ORDER_RCCC (0x00000029U)
215 
216 #define NVSIPL_PIXEL_ORDER_CCCR (0x0000002AU)
217 
218 #define NVSIPL_PIXEL_ORDER_CRCC (0x0000002BU)
219 
220 #define NVSIPL_PIXEL_ORDER_CCRC (0x0000002CU)
221 
223 #define NVSIPL_PIXEL_ORDER_CCCC (0x0000002DU)
224 
227 #define NVSIPL_PIXEL_ORDER_BGGI_RGGI (0x0000002EU)
228 
229 #define NVSIPL_PIXEL_ORDER_GBIG_GRIG (0x0000002FU)
230 
231 #define NVSIPL_PIXEL_ORDER_GIBG_GIRG (0x00000030U)
232 
233 #define NVSIPL_PIXEL_ORDER_IGGB_IGGR (0x00000031U)
234 
235 #define NVSIPL_PIXEL_ORDER_RGGI_BGGI (0x00000032U)
236 
237 #define NVSIPL_PIXEL_ORDER_GRIG_GBIG (0x00000033U)
238 
239 #define NVSIPL_PIXEL_ORDER_GIRG_GIBG (0x00000034U)
240 
241 #define NVSIPL_PIXEL_ORDER_IGGR_IGGB (0x00000035U)
242 
246 typedef struct {
253 
254 #ifdef __cplusplus
255 } /* extern "C" */
256 #endif /* __cplusplus */
257 
258 #endif /* NVSIPL_CAP_STRUCTS_H */
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_A
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_A
Specifies CSI port A.
Definition: NvSIPLCapStructs.h:29
NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW8
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW8
Specifies RAW 8.
Definition: NvSIPLCapStructs.h:88
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_GH
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_GH
Specifies CSI port GH.
Definition: NvSIPLCapStructs.h:51
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_E
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_E
Specifies CSI port E.
Definition: NvSIPLCapStructs.h:41
NVSIPL_CAP_INPUT_FORMAT_TYPE_RGB888
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_RGB888
Specifies RGB.
Definition: NvSIPLCapStructs.h:82
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_F
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_F
Specifies CSI port F.
Definition: NvSIPLCapStructs.h:43
NVSIPL_BITS_PER_PIXEL_14
@ NVSIPL_BITS_PER_PIXEL_14
Specifies 14 bits per pixel.
Definition: NvSIPLCapStructs.h:127
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_G
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_G
Specifies CSI port G.
Definition: NvSIPLCapStructs.h:47
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_A1
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_A1
Specifies CSI port A with 1 lane.
Definition: NvSIPLCapStructs.h:54
NvSiplBitsPerPixel
NvSiplBitsPerPixel
Definition: NvSIPLCapStructs.h:119
NvSiplCapInputFormat::bitsPerPixel
NvSiplBitsPerPixel bitsPerPixel
Holds number of bits per pixel for NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_x input format types.
Definition: NvSIPLCapStructs.h:251
NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_8
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_8
Specifies User defined 8 (0x37).
Definition: NvSIPLCapStructs.h:114
NvSiplCapInputFormat::inputFormatType
NvSiplCapInputFormatType inputFormatType
Holds capture input format type.
Definition: NvSIPLCapStructs.h:248
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_D1
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_D1
Specifies CSI port D with 1 lane.
Definition: NvSIPLCapStructs.h:60
NVSIPL_CAP_INPUT_FORMAT_TYPE_YUV422_10
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_YUV422_10
Specifies YUV 4:2:2 10 bits.
Definition: NvSIPLCapStructs.h:77
NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_7
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_7
Specifies User defined 7 (0x36).
Definition: NvSIPLCapStructs.h:112
NVSIPL_BITS_PER_PIXEL_10
@ NVSIPL_BITS_PER_PIXEL_10
Specifies 10 bits per pixel.
Definition: NvSIPLCapStructs.h:123
NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW7
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW7
Specifies RAW 7.
Definition: NvSIPLCapStructs.h:86
NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_6
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_6
Specifies User defined 6 (0x35).
Definition: NvSIPLCapStructs.h:110
NvSiplCapInterfaceType
NvSiplCapInterfaceType
Definition: NvSIPLCapStructs.h:27
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_D
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_D
Specifies CSI port D.
Definition: NvSIPLCapStructs.h:37
NvSiplCapCsiPhyMode
NvSiplCapCsiPhyMode
Definition: NvSIPLCapStructs.h:134
NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_2
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_2
Specifies User defined 2 (0x31).
Definition: NvSIPLCapStructs.h:102
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_H
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_H
Specifies CSI port H.
Definition: NvSIPLCapStructs.h:49
NvSiplCapInputFormat
Holds the capture input format.
Definition: NvSIPLCapStructs.h:246
NVSIPL_CAP_INPUT_FORMAT_TYPE_YUV444
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_YUV444
Specifies YUV 4:4:4.
Definition: NvSIPLCapStructs.h:80
NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW16
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW16
Specifies RAW 16.
Definition: NvSIPLCapStructs.h:96
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_C
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_C
Specifies CSI port C.
Definition: NvSIPLCapStructs.h:35
NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_5
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_5
Specifies User defined 5 (0x34).
Definition: NvSIPLCapStructs.h:108
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_G1
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_G1
Specifies CSI port G with 1 lane.
Definition: NvSIPLCapStructs.h:66
NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_4
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_4
Specifies User defined 4 (0x33).
Definition: NvSIPLCapStructs.h:106
NVSIPL_BITS_PER_PIXEL_16
@ NVSIPL_BITS_PER_PIXEL_16
Specifies 16 bits per pixel.
Definition: NvSIPLCapStructs.h:129
NVSIPL_CAP_INPUT_FORMAT_TYPE_YUV422
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_YUV422
Specifies YUV 4:2:2 8 bits.
Definition: NvSIPLCapStructs.h:75
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_H1
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_H1
Specifies CSI port H with 1 lane.
Definition: NvSIPLCapStructs.h:68
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_C1
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_C1
Specifies CSI port C with 1 lane.
Definition: NvSIPLCapStructs.h:58
NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW10
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW10
Specifies RAW 10.
Definition: NvSIPLCapStructs.h:90
NVSIPL_CAP_CSI_INTERFACE_TYPE_MAX
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_MAX
Definition: NvSIPLCapStructs.h:70
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_B1
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_B1
Specifies CSI port B with 1 lane.
Definition: NvSIPLCapStructs.h:56
NvSiplCapInputFormatType
NvSiplCapInputFormatType
Definition: NvSIPLCapStructs.h:73
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_EF
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_EF
Specifies CSI port EF.
Definition: NvSIPLCapStructs.h:45
NVSIPL_BITS_PER_PIXEL_20
@ NVSIPL_BITS_PER_PIXEL_20
Specifies 20 bits per pixel.
Definition: NvSIPLCapStructs.h:131
NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW14
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW14
Specifies RAW 14.
Definition: NvSIPLCapStructs.h:94
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_E1
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_E1
Specifies CSI port E with 1 lane.
Definition: NvSIPLCapStructs.h:62
NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW6
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW6
Specifies RAW 6.
Definition: NvSIPLCapStructs.h:84
NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW20
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW20
Specifies RAW 20.
Definition: NvSIPLCapStructs.h:98
NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_3
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_3
Specifies User defined 3 (0x32).
Definition: NvSIPLCapStructs.h:104
NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_1
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_USER_DEFINED_1
Specifies User defined 1 (0x30).
Definition: NvSIPLCapStructs.h:100
NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW12
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW12
Specifies RAW 12.
Definition: NvSIPLCapStructs.h:92
NVSIPL_CAP_CSI_CPHY_MODE
@ NVSIPL_CAP_CSI_CPHY_MODE
Specifies that CSI is in CPHY mode.
Definition: NvSIPLCapStructs.h:138
NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW12RJ
@ NVSIPL_CAP_INPUT_FORMAT_TYPE_RAW12RJ
Specifies RAW 12 Right Justified.
Definition: NvSIPLCapStructs.h:116
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_B
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_B
Specifies CSI port B.
Definition: NvSIPLCapStructs.h:31
NVSIPL_BITS_PER_PIXEL_8
@ NVSIPL_BITS_PER_PIXEL_8
Specifies 8 bits per pixel.
Definition: NvSIPLCapStructs.h:121
NVSIPL_BITS_PER_PIXEL_12
@ NVSIPL_BITS_PER_PIXEL_12
Specifies 12 bits per pixel.
Definition: NvSIPLCapStructs.h:125
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_CD
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_CD
Specifies CSI port CD.
Definition: NvSIPLCapStructs.h:39
NVSIPL_CAP_CSI_DPHY_MODE
@ NVSIPL_CAP_CSI_DPHY_MODE
Specifies that CSI is in DPHY mode.
Definition: NvSIPLCapStructs.h:136
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_F1
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_F1
Specifies CSI port F with 1 lane.
Definition: NvSIPLCapStructs.h:64
NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_AB
@ NVSIPL_CAP_CSI_INTERFACE_TYPE_CSI_AB
Specifies CSI port AB.
Definition: NvSIPLCapStructs.h:33