Enabling Memory Latent Fault Test

A memory latent fault test is used to test LPDDR memory. The purpose of the test is to detect if any memory faults are present in LPDDR. The test uses a specific data pattern write, read, and verify operations to check for memory faults. On detection of any faulty addresses, the pages are retired by adding them to a list and not used for allocation. The test is done at Key-On/Key-Off IST and covers the entire memory.

Note: Enabling latent fault test will increase the IST timeout in NVIDIA DRIVE® OS MCU software.

The following example shows how to enable this feature:

diff --git a/drive_av/qnx/platform_config_profile.json b/drive_av/qnx/platform_config_profile.json
index e8f4a40..56aa5c3 100644
--- a/drive_av/qnx/platform_config_profile.json
+++ b/drive_av/qnx/platform_config_profile.json
@@ -110,6 +110,9 @@
#endif
#ifdef ENABLE_PVA
"ENABLE_PVA",
+#endif
+#ifdef ENABLE_LFT
+ "ENABLE_LFT",
#endif
"ENABLE_HV_LOAD",
"ENABLE_DISP_LA_PTSA",
@@ -147,6 +150,9 @@
#endif
#ifdef ENABLE_PVA
"ENABLE_PVA",
+#endif
+#ifdef ENABLE_LFT
+ "ENABLE_LFT",
#endif
"ENABLE_HV_LOAD",
"ENABLE_DISP_LA_PTSA",
@@ -158,6 +164,9 @@
#endif
#ifdef ENABLE_PVIT
"ENABLE_PVIT",
+#endif
+#ifdef ENABLE_LFT
+ "ENABLE_LFT",
#endif
"ENABLE_HV_LOAD",
"ENABLE_CCPLEX_SMMU_PTW"