GTC Silicon Valley-2019: Volta & Turing: Architecture and Performance optimization
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GTC Silicon Valley-2019 ID:S9234:Volta & Turing: Architecture and Performance optimization
Guillaume ThomasCollignon(NVIDIA)
This presentation will review some basic optimization rules and will present some of the new features introduced in the Volta and Turing architectures. We will show some practical examples of how developers can use these features to speed up their codes.